diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 22cfa4d..0b13856 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -44,11 +44,6 @@
 	imply CMD_SATA
 	imply PANIC_HANG
 
-config TARGET_MPC8541CDS
-	bool "Support MPC8541CDS"
-	select ARCH_MPC8541
-	select FSL_VIA
-
 config TARGET_MPC8548CDS
 	bool "Support MPC8548CDS"
 	select ARCH_MPC8548
@@ -364,14 +359,6 @@
 	select FSL_LAW
 	select SYS_FSL_HAS_DDR1
 
-config ARCH_MPC8541
-	bool
-	select FSL_LAW
-	select SYS_FSL_HAS_DDR1
-	select SYS_FSL_HAS_SEC
-	select SYS_FSL_SEC_BE
-	select SYS_FSL_SEC_COMPAT_2
-
 config ARCH_MPC8544
 	bool
 	select FSL_LAW
@@ -959,7 +946,6 @@
 				ARCH_C29X	|| \
 				ARCH_MPC8536	|| \
 				ARCH_MPC8540	|| \
-				ARCH_MPC8541	|| \
 				ARCH_MPC8544	|| \
 				ARCH_MPC8548	|| \
 				ARCH_MPC8555	|| \
@@ -1193,7 +1179,6 @@
 			ARCH_MPC8548	|| \
 			ARCH_MPC8568
 	default 8 if	ARCH_MPC8540	|| \
-			ARCH_MPC8541	|| \
 			ARCH_MPC8555	|| \
 			ARCH_MPC8560
 	help
@@ -1267,7 +1252,7 @@
 config SYS_FSL_LBC_CLK_DIV
 	int "Divider of platform clock"
 	depends on FSL_ELBC || ARCH_MPC8540 || \
-		ARCH_MPC8548 || ARCH_MPC8541 || \
+		ARCH_MPC8548 || \
 		ARCH_MPC8555 || ARCH_MPC8560 || \
 		ARCH_MPC8568
 
@@ -1286,7 +1271,6 @@
 
 source "board/emulation/qemu-ppce500/Kconfig"
 source "board/freescale/corenet_ds/Kconfig"
-source "board/freescale/mpc8541cds/Kconfig"
 source "board/freescale/mpc8548cds/Kconfig"
 source "board/freescale/mpc8555cds/Kconfig"
 source "board/freescale/mpc8568mds/Kconfig"
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index fc25bb2..e8126c9 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -301,8 +301,8 @@
 int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 /* Everything after the first generation of PQ3 parts has RSTCR */
-#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \
-	defined(CONFIG_ARCH_MPC8555) || defined(CONFIG_ARCH_MPC8560)
+#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8555) || \
+	defined(CONFIG_ARCH_MPC8560)
 	unsigned long val, msr;
 
 	/*
diff --git a/arch/powerpc/cpu/mpc85xx/pci.c b/arch/powerpc/cpu/mpc85xx/pci.c
index 9a6fc13..5597301 100644
--- a/arch/powerpc/cpu/mpc85xx/pci.c
+++ b/arch/powerpc/cpu/mpc85xx/pci.c
@@ -120,7 +120,7 @@
 
 	pci_register_hose(hose);
 
-#if defined(CONFIG_TARGET_MPC8555CDS) || defined(CONFIG_TARGET_MPC8541CDS)
+#if defined(CONFIG_TARGET_MPC8555CDS)
 	/*
 	 * This is a SW workaround for an apparent HW problem
 	 * in the PCI controller on the MPC85555/41 CDS boards.
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 864c53c..90c9fe1 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -607,8 +607,8 @@
 	 * for that SOC. This information is taken from application note
 	 * AN2919.
 	 */
-#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \
-	defined(CONFIG_ARCH_MPC8560) || defined(CONFIG_ARCH_MPC8555)
+#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8560) || \
+	defined(CONFIG_ARCH_MPC8555)
 	gd->arch.i2c1_clk = sys_info.freq_systembus;
 #elif defined(CONFIG_ARCH_MPC8544)
 	/*